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TSMC considering plans to establish a state-of-the-art chip manufacturing plant in Japan
Taiwan's TSMC is considering growth beyond Taiwan's borders and intends to establish a cutting-edge silicon packaging facility in Japan. The semiconductor titan plans to implement a chip-on-wafer-on substrate (CoWoS) packaging technique in the nation.
Reports indicate that Taiwan Semiconductor Manufacturing Co, also known as TSMC, is considering establishing a sophisticated silicon packaging facility in Japan. Insiders have revealed this move, which could signify significant progress in the rejuvenation of Japan's semiconductor sector.
The talks are just getting started, according to insiders who wished to stay unnamed because the details are not yet public. The titan of the semiconductor industry is considering bringing its chip-on-wafer-on substrate (CoWoS) packaging technology to Japan, as informed by a person familiar with the situation.
CoWoS, an advanced technology, involves piling chips on top of each other, which improves processing power, saves space, and lowers energy use. Currently, all of TSMC's CoWoS capabilities are based in Taiwan. The source stated that there are no confirmed decisions about the size or schedule of potential investments. TSMC, previously referred to as Taiwan Semiconductor Manufacturing Co., chose not to comment on the issue.
The increased need for sophisticated semiconductor packaging worldwide has risen alongside the growth of artificial intelligence, leading chip manufacturers such as TSMC, Samsung Electronics, and Intel to enhance their production capabilities.
In January, TSMC's CEO, C.C. Wei, shared his intention to increase CoWoS production by 100% this year, with additional growth anticipated in 2025. Additionally, TSMC has disclosed plans to boost advanced packaging capacity in Chiayi, located in southern Taiwan, in response to strong market demand, though specific details were not provided.
The building of a fresh CoWoS establishment in Chiayi is set to kick off in early May, based on reports from Taiwan's Central News Agency quoting Vice Premier Cheng Wen-tsan.
TSMC is looking to expand its presence in Japan by enhancing its sophisticated packaging skills. The company has recently opened one facility and declared plans for another in Kyushu, a key chip manufacturing region in southern Japan. The company has teamed up with companies like Sony and Toyota. The total funds expected to be used in the Japanese project are over $20 billion.
In 2021, TSMC set up a cutting-edge packaging research and development center in Ibaraki prefecture, which is located in the northeastern part of Tokyo. Japan's strong foundation in semiconductor materials and equipment, along with growing investments in chip manufacturing capabilities and a consistent customer base, puts the country in a strong position to take on a bigger role in advanced packaging. This was pointed out by a high-ranking officer in Japan's industry ministry.
TrendForce analyst Joanne Chiao has warned that TSMC's possible advanced packaging business in Japan may be limited in size, due to the unclear demand for CoWoS packaging in that country. Chiao also mentioned that the majority of TSMC's existing CoWoS clients are located in the United States.
TSMC's efforts in Japan have been significantly supported by large grants from the Japanese government. This is because Japan sees semiconductor production as vital to its economic stability, especially after facing challenges in relation to South Korea and Taiwan.
At the same time, it's said that Intel is considering setting up a sophisticated packaging research center in Japan, with the aim of strengthening partnerships with local chip supply companies, as informed by those in the know. In the meantime, Samsung is in the process of establishing a similar research facility in Yokohama, which is to the southwest of Tokyo, with the support of the government. Furthermore, the South Korean chip manufacturer is in talks with Japanese and other firms about sourcing materials as it seeks to utilize packaging technology to close the gap in high-bandwidth memory chips, as stated by Reuters.
(Incorporating information from various sources)
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