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TSMC considering establishing a state-of-the-art chip manufacturing facility in Japan
TSMC from Taiwan is planning to broaden its horizons beyond Taiwan and aims to establish a high-tech silicon packaging facility in Japan. The semiconductor powerhouse is considering setting up a chip-on-wafer-on substrate (CoWoS) packaging technology in Japan.
TSMC, also known as Taiwan Semiconductor Manufacturing Co, is allegedly intending to establish a sophisticated silicon packaging facility in Japan, according to insiders. This move indicates a possible significant advancement in Japan's attempts to rejuvenate its semiconductor industry.
The talks are still in their initial phases, according to unnamed individuals who chose to keep their identities hidden due to the confidentiality of the information. The giant in the semiconductor industry is considering the possibility of bringing its chip-on-wafer-on-substrate (CoWoS) packaging technology to Japan, as disclosed by an insider familiar with the situation.
CoWoS, an advanced technology, involves layering chips on top of each other, which boosts processing power, saves space, and lowers energy use. Currently, all of TSMC's CoWoS capacity is located in Taiwan. The source revealed that no firm decisions have been made yet about the size or schedule of possible investments. TSMC, previously referred to as Taiwan Semiconductor Manufacturing Co., refused to comment on the issue.
The rising need for sophisticated semiconductor packaging worldwide has grown alongside the artificial intelligence explosion, pushing chip manufacturers such as TSMC, Samsung Electronics, and Intel to increase production.
In January, TSMC's CEO C.C. Wei revealed strategies to amplify CoWoS production by twofold this year, with additional expansion plans in place for 2025. Additionally, TSMC disclosed plans to enhance the advanced packaging capacity in Chiayi, in the southern part of Taiwan, to cater to strong market needs, though no specific details were provided.
The building of a new CoWoS establishment in Chiayi is set to begin in early May, according to reports from Taiwan's Central News Agency citing Vice Premier Cheng Wen-tsan.
TSMC is striving to strengthen its advanced packaging abilities in an effort to broaden its presence in Japan. It recently opened a facility and declared plans for another on Kyushu Island, a crucial center for chip production. Collaborations with companies like Sony and Toyota have been established by TSMC, with projected total investments in the Japanese project surpassing $20 billion.
In addition, in 2021, TSMC set up a state-of-the-art packaging research and development facility in Ibaraki, a region to the northeast of Tokyo. The strong infrastructure for semiconductor materials and machinery in Japan, along with the increasing investments in chip production capabilities and a reliable customer base, make the country well-suited to take on a more significant role in advanced packaging. This was highlighted by a high-ranking representative from Japan's industry ministry.
TrendForce analyst Joanne Chiao warned that TSMC's possible high-tech packaging enterprise in Japan could face limitations in terms of size due to the unpredictable demand for CoWoS packaging in the country. Chiao further mentioned that the majority of TSMC's existing CoWoS clients are located in the United States.
So far, TSMC's efforts in Japan have been significantly supported by hefty financial aid from the Japanese government. This is because Japan regards semiconductor manufacturing as crucial to its economic stability, especially after experiencing difficulties in competition with South Korea and Taiwan.
At the same time, it is believed that Intel is considering setting up a high-end packaging research center in Japan to strengthen its partnerships with local chip suppliers, as per insiders. Meanwhile, Samsung is establishing a similar facility in Yokohama, southwest of Tokyo, with support from the government. Furthermore, the South Korean chip manufacturer is in talks with Japanese and other firms about material sourcing, as it aims to utilize packaging technology to catch up in the high-bandwidth memory chip sector, as stated by Reuters.
(Incorporating information from various sources)
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